Zynq ps gpio example

Zynq ps gpio example DEFAULT
/******************************************************************************* Copyright (C) 2010 - 2021 Xilinx, Inc. All rights reserved.* SPDX-License-Identifier: MIT*******************************************************************************//*****************************************************************************//*** @file xgpiops_polled_example.c** This file contains an example for using GPIO hardware and driver. This* example provides the usage of APIs for reading/writing to the individual pins.* Please see xgpiops.h file for description of the pin numbering.** @note This example assumes that there is a Uart device in the HW* design. This example is to provide support only for zcu102 on* ZynqMp Platform and only for zc702 on Zynq Platform.* For ZynqMP Platform, Input pin is 22(sw19 on zcu102 board) and Output Pin is* 23(DS50 on zcu102 board).* For Zynq Platform, Input Pins are 12(sw14 on zc702 board), 14(sw13 on* zc702 board) and Output Pin is 10(DS23 on zc702 board).* This example supports the VCK190 and VMK180 for Versal, but requires a PL* shim. See Answer Record AR# 75677 for details.* On the Versal Platform we have two GPIOPS instances :PMC GPIO and PS GPIO* PMC GPIO contain 4 banks and 116 pins, organized as follows:* Bank 0 I/Os: 25:0 (MIO)* Bank 1: I/Os: 51:26 (MIO)* Bank 3: I/Os: 83:52 (EMIO)* Bank 4: I/Os: 115:84 (EMIO)* PS GPIO contains 2 banks and 58 pins* Bank 0 I/Os: 25:0 (MIO)* Bank 3: I/Os: 57:26 (EMIO)* See Figure 61 in AM011 Versal TRM for details.* Driver supports both PS GPIO and PMC GPIO.* For accessing PMC GPIOs application you need to set "GPIO.PmcGpio = 1"* otherwise it accesses PS GPIO.** <pre>* MODIFICATION HISTORY:** Ver Who Date Changes* ----- ---- -------- -----------------------------------------------* 1.00a sv 01/18/10 First Release* 1.01a sv 04/15/12 Removed the calling of some unnecessary APIs.* Updated the examples for a ZC702 board .* Updated the example to use only pin APIs.* 3.3 ms 04/17/17 Added notes about input and output pin description* for zcu102 and zc702 boards.* 3.7 sne 12/04/19 Reverted versal example support.* 3.8 sne 09/17/20 Added description for Versal PS and PMC GPIO pins.* 3.9 sne 11/19/20 Added versal PmcGpio example support.** </pre>******************************************************************************//***************************** Include Files ********************************/#include"xparameters.h"#include"xgpiops.h"#include"xstatus.h"#include"xplatform_info.h"#include<xil_printf.h>/************************** Constant Definitions ****************************//* * The following constants map to the XPAR parameters created in the * xparameters.h file. They are defined here such that a user can easily * change all the needed parameters in one place for ZYNQ & ZYNQMP.*/#ifndef GPIO_DEVICE_ID#defineGPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID#endif/* * The following constant is used to wait after an LED is turned on to make * sure that it is visible to the human eye. This constant might need to be * tuned for faster or slower processor speeds.*/#defineLED_DELAY10000000#defineLED_MAX_BLINK0x10/* Number of times the LED Blinks */#defineprintf xil_printf /* Smalller foot-print printf *//**************************** Type Definitions ******************************//***************** Macros (Inline Functions) Definitions *******************//************************** Function Prototypes ****************************/staticintGpioOutputExample(void);staticintGpioInputExample(u32 *DataRead);intGpioPolledExample(u16 DeviceId, u32 *DataRead);/************************** Variable Definitions **************************/static u32 Input_Pin; /* Switch button */static u32 Output_Pin; /* LED button *//* * The following are declared globally so they are zeroed and can be * easily accessible from a debugger.*/XGpioPs Gpio; /* The driver instance for GPIO Device. *//*****************************************************************************//**** Main function to call the example.*** @return* - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note None*******************************************************************************/intmain(void){int Status; u32 InputData;printf("GPIO Polled Mode Example Test \r\n"); Status = GpioPolledExample(GPIO_DEVICE_ID, &InputData);if (Status != XST_SUCCESS) {printf("GPIO Polled Mode Example Test Failed\r\n");return XST_FAILURE; }printf("Data read from GPIO Input is 0x%x\n\r", (int)InputData);printf("Successfully ran GPIO Polled Mode Example Test\r\n");return XST_SUCCESS;}/*****************************************************************************//**** The purpose of this function is to illustrate how to use the GPIO driver to* turn on/off an LED and read the inputs using the pin APIs.** @param DeviceId is the XPAR_<GPIO_instance>_DEVICE_ID value from* xparameters.h* @param DataRead is the pointer where the data read from GPIO Input is* returned.** @return* - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note This function will not return if the test is running.*******************************************************************************/intGpioPolledExample(u16 DeviceId, u32 *DataRead){int Status; XGpioPs_Config *ConfigPtr;int Type_of_board;/* Initialize the GPIO driver. */ ConfigPtr = XGpioPs_LookupConfig(GPIO_DEVICE_ID); Type_of_board = XGetPlatform_Info();switch (Type_of_board) {case XPLAT_ZYNQ_ULTRA_MP: Input_Pin = 22; Output_Pin = 23;break;case XPLAT_ZYNQ: Input_Pin = 14; Output_Pin = 10;break;#ifdef versalcase XPLAT_VERSAL:/* Accessing PMC GPIO by setting field to 1 */ Gpio.PmcGpio = 1; Input_Pin = 56; Output_Pin = 52;break;#endif } Status = XGpioPs_CfgInitialize(&Gpio, ConfigPtr, ConfigPtr->BaseAddr);if (Status != XST_SUCCESS) {return XST_FAILURE; }/* Run the Output Example. */ Status = GpioOutputExample();if (Status != XST_SUCCESS) {return XST_FAILURE; }/* Run the Input Example. */ Status = GpioInputExample(DataRead);if (Status != XST_SUCCESS) {return XST_FAILURE; }return XST_SUCCESS;}/*****************************************************************************//**** This function does a minimal test on the GPIO device configured as OUTPUT.** @param None.** @return - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note None.*****************************************************************************/staticintGpioOutputExample(void){ u32 Data;volatileintDelay; u32 LedLoop;/* * Set the direction for the pin to be output and * Enable the Output enable for the LED Pin.*/XGpioPs_SetDirectionPin(&Gpio, Output_Pin, 1);XGpioPs_SetOutputEnablePin(&Gpio, Output_Pin, 1);/* Set the GPIO output to be low. */XGpioPs_WritePin(&Gpio, Output_Pin, 0x0);for (LedLoop = 0; LedLoop < LED_MAX_BLINK; LedLoop ++) {#ifndef __SIM__/* Wait a small amount of time so the LED is visible. */for (Delay = 0; Delay < LED_DELAY; Delay++);#endif/* Set the GPIO Output to High. */XGpioPs_WritePin(&Gpio, Output_Pin, 0x1);/* * Read the state of the data and verify. If the data * read back is not the same as the data written then * return FAILURE.*/ Data = XGpioPs_ReadPin(&Gpio, Output_Pin);if (Data != 1 ) {return XST_FAILURE; }#ifndef __SIM__/* Wait a small amount of time so the LED is visible. */for (Delay = 0; Delay < LED_DELAY; Delay++);#endif/* Clear the GPIO Output. */XGpioPs_WritePin(&Gpio, Output_Pin, 0x0);/* * Read the state of the data and verify. If the data * read back is not the same as the data written then * return FAILURE.*/ Data = XGpioPs_ReadPin(&Gpio, Output_Pin);if (Data != 0) {return XST_FAILURE; } }return XST_SUCCESS;}/******************************************************************************//**** This function performs a test on the GPIO driver/device with the GPIO* configured as INPUT.** @param DataRead is the pointer where the data read from GPIO Input is* returned** @return - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note None.*******************************************************************************/staticintGpioInputExample(u32 *DataRead){/* Set the direction for the specified pin to be input. */XGpioPs_SetDirectionPin(&Gpio, Input_Pin, 0x0);/* Read the state of the data so that it can be verified. */ *DataRead = XGpioPs_ReadPin(&Gpio, Input_Pin);return XST_SUCCESS;}
Sours: https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/gpiops/examples/xgpiops_polled_example.c
/******************************************************************************* Copyright (C) 2010 - 2021 Xilinx, Inc. All rights reserved.* SPDX-License-Identifier: MIT******************************************************************************//*****************************************************************************//*** @file xgpiops_intr_example.c** This file contains a design example using the GPIO driver (XGpioPs) in an* interrupt driven mode of operation.** The example uses the interrupt capability of the GPIO to detect push button* events and set the output LEDs based on the input.** @note* This example assumes that there is a Uart device in the HW design.* This example is to provide support only for zcu102 on ZynqMp Platform and* only for zc702 on Zynq Platform.* For ZynqMP Platform, Input pin is 22(sw19 on zcu102 board) and Output Pin is* 23(DS50 on zcu102 board).* For Zynq Platform, Input Pins are 12(sw14 on zc702 board), 14(sw13 on* zc702 board) and Output Pin is 10(DS23 on zc702 board). SW15 on zc702 board* is a combination of sw13 and sw14. To operate either of the input* pins, keep SW15 low(both should be 00).* This example supports the VCK190 and VMK180 for Versal, but requires a PL* shim. See Answer Record AR# 75677 for details.* On the Versal Platform we have two GPIOPS instances :PMC GPIO and PS GPIO* PMC GPIO contain 4 banks and 116 pins, organized as follows:* Bank 0 I/Os: 25:0 (MIO)* Bank 1: I/Os: 51:26 (MIO)* Bank 3: I/Os: 83:52 (EMIO)* Bank 4: I/Os: 115:84 (EMIO)* PS GPIO contains 2 banks and 58 pins* Bank 0 I/Os: 25:0 (MIO)* Bank 3: I/Os: 57:26 (EMIO)* See Figure 61 in AM011 Versal TRM for details.* Driver supports both PS GPIO and PMC GPIO.* For accessing PMC GPIOs application you need to set "GPIO.PmcGpio = 1"* otherwise it accesses PS GPIO.** <pre>* MODIFICATION HISTORY:** Ver Who Date Changes* ----- ---- -------- -----------------------------------------------* 1.00a sv 01/18/10 First Release* 3.3 ms 04/17/17 Added notes about gpio input and output pin description* for zcu102 and zc702 boards, configured Interrupt pin* to input pin for proper working of interrupt example.* 3.7 sne 12/04/19 Reverted versal example support.* 3.8 sne 09/17/20 Added description for Versal PS and PMC GPIO pins.* 3.9 sne 11/19/20 Added versal PmcGpio example support.**</pre>*******************************************************************************//***************************** Include Files *********************************/#include"xparameters.h"#include"xgpiops.h"#include"xscugic.h"#include"xil_exception.h"#include"xplatform_info.h"#include<xil_printf.h>/************************** Constant Definitions *****************************//* * The following constants map to the names of the hardware instances that * were created in the EDK XPS system. They are defined here such that * the user can easily change all the needed device IDs in one place.*/#defineGPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID#defineINTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID#ifdef versal#defineGPIO_INTERRUPT_ID XPMC_GPIO_INT_ID#else#defineGPIO_INTERRUPT_ID XPAR_XGPIOPS_0_INTR#endif/* The following constants define the GPIO banks that are used. */#ifdef versal#defineGPIO_BANK XGPIOPS_BANK3 /* Bank 3 of the GPIO Device */#else#defineGPIO_BANK XGPIOPS_BANK0 /* Bank 0 of the GPIO Device */#endif/**************************** Type Definitions *******************************//***************** Macros (Inline Functions) Definitions *********************//************************** Function Prototypes ******************************/staticintGpioIntrExample(XScuGic *Intc, XGpioPs *Gpio, u16 DeviceId, u16 GpioIntrId);staticvoidIntrHandler(void *CallBackRef, u32 Bank, u32 Status);staticintSetupInterruptSystem(XScuGic *Intc, XGpioPs *Gpio, u16 GpioIntrId);/************************** Variable Definitions *****************************//* * The following are declared globally so they are zeroed and so they are * easily accessible from a debugger.*/static XGpioPs Gpio; /* The Instance of the GPIO Driver */static XScuGic Intc; /* The Instance of the Interrupt Controller Driver */static u32 AllButtonsPressed; /* Intr status of the bank */static u32 Input_Bank_Pin; /* Pin Number within Bank */static u32 Input_Pin; /* Switch button */static u32 Output_Pin; /* LED button *//****************************************************************************//**** Main function that invokes the GPIO Interrupt example.*** @return* - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note None.******************************************************************************/intmain(void){int Status;xil_printf("GPIO Interrupt Example Test \r\n");/* * Run the GPIO interrupt example, specify the parameters that * are generated in xparameters.h.*/ Status = GpioIntrExample(&Intc, &Gpio, GPIO_DEVICE_ID, GPIO_INTERRUPT_ID);if (Status != XST_SUCCESS) {xil_printf("GPIO Interrupt Example Test Failed\r\n");return XST_FAILURE; }xil_printf("Successfully ran GPIO Interrupt Example Test\r\n");return XST_SUCCESS;}/****************************************************************************//*** This function shows the usage of interrupt fucntionality of the GPIO device.* It is responsible for initializing the GPIO device, setting up interrupts and* providing a foreground loop such that interrupts can occur in the background.** @param Intc is a pointer to the XScuGic driver Instance.* @param Gpio is a pointer to the XGpioPs driver Instance.* @param DeviceId is the XPAR_<Gpio_Instance>_PS_DEVICE_ID value* from xparameters.h.* @param GpioIntrId is XPAR_<GIC>_<GPIO_Instance>_VEC_ID value* from xparameters.h** @return* - XST_SUCCESS if the example has completed successfully.* - XST_FAILURE if the example has failed.** @note None******************************************************************************/intGpioIntrExample(XScuGic *Intc, XGpioPs *Gpio, u16 DeviceId, u16 GpioIntrId){ XGpioPs_Config *ConfigPtr;int Status;int Type_of_board;/* Initialize the Gpio driver. */ ConfigPtr = XGpioPs_LookupConfig(DeviceId);if (ConfigPtr == NULL) {return XST_FAILURE; } Type_of_board = XGetPlatform_Info();switch (Type_of_board) {case XPLAT_ZYNQ_ULTRA_MP: Input_Bank_Pin = 22; Input_Pin = 22; Output_Pin = 23;break;case XPLAT_ZYNQ: Input_Bank_Pin = 14; Input_Pin = 14; Output_Pin = 10;break;#ifdef versalcase XPLAT_VERSAL:/* Accessing PMC GPIO by setting field to 1 */ Gpio->PmcGpio = 1; Input_Bank_Pin = 4; Input_Pin = 56; Output_Pin = 52;break;#endif }XGpioPs_CfgInitialize(Gpio, ConfigPtr, ConfigPtr->BaseAddr);/* Run a self-test on the GPIO device. */ Status = XGpioPs_SelfTest(Gpio);if (Status != XST_SUCCESS) {return XST_FAILURE; }/* Set the direction for the specified pin to be input */XGpioPs_SetDirectionPin(Gpio, Input_Pin, 0x0);/* Set the direction for the specified pin to be output. */XGpioPs_SetDirectionPin(Gpio, Output_Pin, 1);XGpioPs_SetOutputEnablePin(Gpio, Output_Pin, 1);XGpioPs_WritePin(Gpio, Output_Pin, 0x0);/* * Setup the interrupts such that interrupt processing can occur. If * an error occurs then exit.*/ Status = SetupInterruptSystem(Intc, Gpio, GPIO_INTERRUPT_ID);if (Status != XST_SUCCESS) {return XST_FAILURE; }xil_printf("\n\rPush Switch button to exit\n\r"); AllButtonsPressed = FALSE;/* * Loop forever while the button changes are handled by the interrupt * level processing.*/while(AllButtonsPressed == FALSE);return XST_SUCCESS;}/****************************************************************************//*** This function is the user layer callback function for the bank 0 interrupts of* the GPIO device. It checks if all the switches have been pressed to stop the* interrupt processing and exit from the example.** @param CallBackRef is a pointer to the upper layer callback reference.* @param Status is the Interrupt status of the GPIO bank.** @return None.** @note None.*******************************************************************************/staticvoidIntrHandler(void *CallBackRef, u32 Bank, u32 Status){ XGpioPs *Gpio = (XGpioPs *)CallBackRef; u32 DataRead;/* Push the switch button */ DataRead = XGpioPs_ReadPin(Gpio, Input_Pin);if (DataRead != 0) {XGpioPs_SetDirectionPin(Gpio, Output_Pin, 1);XGpioPs_SetOutputEnablePin(Gpio, Output_Pin, 1);XGpioPs_WritePin(Gpio, Output_Pin, DataRead); AllButtonsPressed = TRUE; }}/*****************************************************************************//**** This function sets up the interrupt system for the example. It enables falling* edge interrupts for all the pins of bank 0 in the GPIO device.** @param GicInstancePtr is a pointer to the XScuGic driver Instance.* @param GpioInstancePtr contains a pointer to the instance of the GPIO* component which is going to be connected to the interrupt* controller.* @param GpioIntrId is the interrupt Id and is typically* XPAR_<GICPS>_<GPIOPS_instance>_VEC_ID value from* xparameters.h.** @return XST_SUCCESS if successful, otherwise XST_FAILURE.** @note None.*****************************************************************************/staticintSetupInterruptSystem(XScuGic *GicInstancePtr, XGpioPs *Gpio, u16 GpioIntrId){int Status; XScuGic_Config *IntcConfig; /* Instance of the interrupt controller */Xil_ExceptionInit();/* * Initialize the interrupt controller driver so that it is ready to * use.*/ IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);if (NULL == IntcConfig) {return XST_FAILURE; } Status = XScuGic_CfgInitialize(GicInstancePtr, IntcConfig, IntcConfig->CpuBaseAddress);if (Status != XST_SUCCESS) {return XST_FAILURE; }/* * Connect the interrupt controller interrupt handler to the hardware * interrupt handling logic in the processor.*/Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, (Xil_ExceptionHandler)XScuGic_InterruptHandler, GicInstancePtr);/* * Connect the device driver handler that will be called when an * interrupt for the device occurs, the handler defined above performs * the specific interrupt processing for the device.*/ Status = XScuGic_Connect(GicInstancePtr, GpioIntrId, (Xil_ExceptionHandler)XGpioPs_IntrHandler, (void *)Gpio);if (Status != XST_SUCCESS) {return Status; }/* Enable falling edge interrupts for all the pins in GPIO bank. */XGpioPs_SetIntrType(Gpio, GPIO_BANK, 0x00, 0xFFFFFFFF, 0x00);/* Set the handler for gpio interrupts. */XGpioPs_SetCallbackHandler(Gpio, (void *)Gpio, IntrHandler);/* Enable the GPIO interrupts of GPIO Bank. */XGpioPs_IntrEnable(Gpio, GPIO_BANK, (1 << Input_Bank_Pin));/* Enable the interrupt for the GPIO device. */XScuGic_Enable(GicInstancePtr, GpioIntrId);/* Enable interrupts in the Processor. */Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);return XST_SUCCESS;}
Sours: https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/gpiops/examples/xgpiops_intr_example.c
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51786 - Zynq-7000 Example Design - Flashes MIO GPIO LEDs, EMIO GPIO LEDs and AXI GPIO LEDs on the ZC702.

Example that flashes LEDs on the ZC702: 2 MIO LEDs, 4 EMIO LEDs and 4 AXI LEDs.

Note: An Example Design is an answer record that provides technical tips to test a specific functionality on Zynq-7000.

A tip can be a snippet of code, a snapshot, a diagram or a full design implemented with a specific version of the Xilinx tools.

It is up to the user to "update" these tips to future Xilinx tools releases and to "modify" the Example Design to fulfill their needs.

Limited support is provided by Xilinx on these Example Designs.

 

Implementation Details:
Design TypePS and PL
SW TypeStandalone
CPUsSingle CPU
PS FeaturesUART, GPIO
PL CoresAXI GPIO SLAVE
Boards/ToolsZC702
Xilinx Tools VersionEDK 14.1
Other details--
Address Map
Base AddressSizeBus Interface
AXI GPIO0x4120000064KS_AXI
PS UART1

0xE0001000

4KMIO
PS GPIO

0xE000A000

4KMIO/EMIO
Files Provided

 Archived 2015.1 project.

 

 

Full Vivado design is attached.

Sours: https://www.xilinx.com/support/answers/51786.html

Gpio-PS standalone driver

This page gives an overview of gpiops driver which is available as part of the Xilinx Vivado and SDK distribution.
The Xilinx General purpose I/O is a collection of input/output pins available to the software application running on Processing system.
For more information, please refer Chapter 27: Real Time Clock in Zynqmp Trmwhich includes links to the official documentation and resource utilization. 

Driver Sources

The driver source code is organized into different folders. The table below shows the rtcpsu driver source organization.
DirectoryDescription
srcDriver source files
examplesExample applications that show how to use the driver features
docProvides the API and data structure details
dataDriver .tcl and .mdd file

For a full list of features supported by this IP, please refer Chapter 27: Real Time Clock in Zynqmp Trm

Features

Controller Features

ZYNQMP

  • 78 GPIO signals for device pins.
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 GPIO signals between the PS and PL through the EMIO interface.
    • 96 inputs.
    • 192 outputs (96 true outputs and 96 output enables).
  • I/O interface is organized into 6 banks(3 MIO and 3 EMIO)
  • Interface control registers are grouped by bank {0:5}.
  • Input values are read using the six DATA_RO_x registers.
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis.
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

ZYNQ

  • 54 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 192 GPIO signals between the PS and PL via the EMIO interface.
    • 64 Inputs
    • 128 Outputs(64 true outputs and 64 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis.
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

Driver Features

The Gpiops Standalone driver support the below things.

  • All controller features supported.

Known Issues and Limitations

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab.

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops/examples

Test NameExample source

Description

Polledxgpiops_polled_example.cThis example provides the usage of API's for reading/writing to the individual pins.
Interrupt

xgpiops_intr_example.c

This example shows the usage of the driver in interrupt mode. It uses the interrupt capability of the GPIO to detect push button events and set the output LED based on the input.

Example Application Usage

GpioPs examples

Expected Output

xgpiops_polled_example.c OUTPUT: GPIO Polled Mode Example Test Data read from GPIO Input is 0x0 Successfully ran GPIO Polled Mode Example Test xgpiops_intr_example.c OUTPUT: GPIO Interrupt Example Test Push Switch button to exit Successfully ran GPIO Interrupt Example Test

2021.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L433

2020.2

https://github.com/Xilinx/embeddedsw/blob/release-2020.2/doc/ChangeLog#L201

2020.1

https://github.com/Xilinx/embeddedsw/blob/release-2020.1/doc/ChangeLog#L47

2019.2

https://github.com/Xilinx/embeddedsw/blob/release-2019.2/doc/ChangeLog#L23

2019.1

https://github.com/Xilinx/embeddedsw/blob/release-2019.1/doc/ChangeLog#L367

2018.3

https://github.com/Xilinx/embeddedsw/blob/release-2018.3/doc/ChangeLog#L133

Sours: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841744/Gpio-PS+standalone+driver

Example gpio zynq ps


Abstract: The tutorial provides a brief overview of available input/output peripherals (IOPs) and their relation with multiplexed input/output (MIO) and extended MIO (EMIO) in Zynq 7000. After that, a comprehensive detail of general purpose input/output (GPIO), which is one of the available IOPs in Zynq 7000, and its programming via MIO and EMIO is explained. Lastly, the GPIOs are implemented by making use of Vivado and Zedboard as a software and hardware platform respectively.

To facilitate the learners, this tutorial is sub-divided into three parts:

  • A theoretical overview of IOPs and detailed version of GPIO with their relations with MIO/EMIO,
  • Implementation of GPIO via MIO on Zedboard, and Vivado,
  • Implementation of GPIO via EMIO on Zedboard and Vivado.

Part 1: Implementation of GPIO via MIO and EMIO in All Programmable SoC (AP SoC) Zynq 7000

The IOPs (e.g., USB, UART, I2C and so on) can interact with Zynq 7000 SoC via either MIOs or EMIOs. The processor system (PS) part of Zynq 7000 has many built-in IOP controller with each controller provides its own driver available in the form of C code, enabling the users to integrate the external IOPs with PS without any extra overhead. In the following tutorials, we will be using these drivers to configure external IOPs. It is important to note that these controller are only available in PS part, so IOPs can only communicate with this part of Zynq 7000 SoC. If someone is interested in using IOPs in programmable logic (PL) part of Zynq 7000 SoC, he shall design the pertaining accelerator or can used Xilinx accelerator in PL. PS of Zynq directly can interact with the external IOPs via MIO.  The MIO pins however are limited in number.  Xilinx also provides its solution by introducing EMIO pins. So, EMIO can be used to exploit IOP controllers available in PS to make direct communication between PS and PL or to interact with the external IOPs via PL in case if all the MIO pins are occupied. The available IOP controllers in PS of Zynq are shown in the following figure.

GPIO: General purpose input/output (GPIO) ,shown in red dotted rectangle in the above figure, is one of the IOPs supported by Zynq 7000. According to Wikipedia “GPIO is an uncommitted digital signal pin on an integrated circuit or electronic circuit board whose behavior—including whether it acts an input or output—is controllable by the user at run time. GPIOs have no predefined purpose and are unused by default”.  It is cleared from the definition of GPIOs that their functions and IO directions are fully configurable. Their application includes but not limited to monitor and control the other circuitry. They can be used to implement low data rate communication standards (e.g., 12C, UART, SPI, etc.).  In Zynq 7000, PS can use GPIO to monitor or control the signals in PL and in external world via EMIO and MIO respectively.

The GPIO peripheral provides a software with observation and control of up to 54 device pins via the MIO module. It also provides access to 64 inputs from the Programmable Logic (PL) and 128 outputs to the PL through the EMIO interface. The GPIO is organized into four banks of registers that group related interface signals.

Each GPIO can be independently and dynamically programmed as input, output, or interrupt sensing. Software can read all GPIO values within a bank using a single load instruction, or write data to one or more GPIOs (within a range of GPIOs) using a single store instruction. The GPIO control and status registers are memory mapped at base address 0xE000_A000 [ug585].

  • Bank0: 32-bit bank controlling MIO pins[31:0]
  • Bank1: 22-bit bank controlling MIO pins[53:32]
  • Bank2: 32-bit bank controlling EMIO signals[31:0]
  • Bank3: 32-bit bank controlling EMIO signals[63:32]

Functional Description of GPIO banks: All the registers used to configure GPIO bank(s) (bank0 and bank1) are shown in the following figure and the functions of the registers are summarized as follows:

  • DATA_RO enables software to observe the value on the device pin,
  • DATA allows all 32 bits data to write at one time,
  • MASK_DATA_LSW and MASK_DATA_MSW enable any combination of up to 16 LSB or MSB bits to write respectively,
  • DIRM control the direction of the respective bank (e.g., when DIRM[x]==0, the output driver is disabled), OEN enables the outputs ( e.g., when OEN[x]==0, the output driver is disabled),
  • INT_MASK (read only) shows which bits are currently masked or enabled,
  • 1 to any bit of INT_EN register enables/unmasks that signal for interrupts,
  • 1 to any bit of INT_DIS register masks that signal for interrupts,
  • INT_STAT register shows if an interrupt event has occurred or not. Writing a 1 to a bit in this register clears the interrupt status for that bit.
  • INT_TYPE register controls whether the interrupt is edge sensitive or level sensitive
  • POLARITY register controls whether the interrupt is active-Low or active High (or falling-edge sensitive or rising-edge sensitive).
  • If INT_TYPE is set to edge sensitive, then INT_ON_ANY register enables an interrupt event on both rising and falling edges. This register is ignored if INT_TYPE is set to level sensitive.

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Zynq TutorialsSours: https://fpgawork.com/2018/12/20/implementation-of-gpio-via-mio-and-emio-in-all-programmable-soc-ap-soc-zynq-7000/
Implementation of GPIO ( i.e., two buttons, one LED, and Pmod E ) via MIO on ZedBoard.

Linux GPIO Driver

The purpose of this page is to introduce two methods for interacting with GPIO from user space on Zynq-7000 and Zynq Ultrascale+ MPSoC: the SysFs interface and the Linux kernel drivers (gpio-keys, leds-gpio).

The GPIO subsystem is documented in the kernel documentation in Documentation/gpio/.

Note: The SysFs driver has been tested and is working. It has been accepted into the mainline kernel and the old char mode GPIO driver that didn't work with arch/powerpc has been removed from the tree.


Table of Contents

ZynqMP

  • 78 GPIO signals for device pins

    • Routed through the MIO multiplexer.

    • Outputs are 3-state capable.

  • 288 GPIO signals between the PS and PL through the EMIO interface

    • 96 inputs.

    • 192 outputs (96 true outputs and 96 output enables).

  • The function of each GPIO can be dynamically programmed on an individual or group basis.

  • Enable, bit or bank data write, output enable and direction controls.

  • Programmable interrupts on individual GPIO basis

    • Status read of raw and masked interrupt.

    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive,negative, or both).

Zynq

  • 54 GPIO signals for device pins

    • Routed through the MIO multiplexer.

    • Outputs are 3-state capable.

  • 192 GPIO signals between the PS and PL via the EMIO interface

    • 64 Inputs

    • 128 Outputs(64 true outputs and 64 output enables).

  • The function of each GPIO can be dynamically programmed on an individual or group basis.

  • Enable, bit or bank data write, output enable and direction controls.

  • Programmable interrupts on individual GPIO basis

    • Status read of raw and masked interrupt.

    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive,negative, or both).

ZynqMP

  • 78 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 GPIO signals between the PS and PL through the EMIO interface
    • 96 inputs.
    • 192 outputs (96 true outputs and 96 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive,negative, or both).

Zynq

  • 54 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 192 GPIO signals between the PS and PL via the EMIO interface
    • 64 Inputs
    • 128 Outputs(64 true outputs and 64 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive,negative, or both).

Gpio driver have a dependency on pin-controller driver. Because of this dependency the GPIO driver probe was deferred from the 2017.1 release.
If any drivers have a dependency on GPIO driver that driver should have defer the probe.

To enable GPIO in the kernel, the following configuration options need to be enabled:

CONFIG_GPIO_SYSFS=y CONFIG_SYSFS=y CONFIG_GPIO_ZYNQ=y
[email protected] { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "xlnx,zynq-gpio-1.0"; clocks = <&clkc 42>; gpio-controller; interrupt-controller; interrupt-parent = <&intc>; interrupts = <0 20 4>; interrupt-controller; #interrupt-cells = <2>; reg = <0xe000a000 0x1000>; };

SysFs Interface

The SysFs interface is a very simple way to access the GPIO from user space and has the advantage of requiring very little setup. This option is a good choice for manually checking the status of an input or writing values to outputs; this method should not be used where interrupts are required.
The SysFs interface is documented in the kernel documentation in Documentation/gpio/sysfs.txt

Using GPIO with SysFs

The GPIO driver fits in the Linux GPIO framework. It does provide access to the GPIO by user space through the sysfs filesystem. For details please refer to - the above-mentioned - documentation. The following text is aimed to augment, not replace the existing documentation.

For the examples below, there are some important points with sysfs.

  1. The GPIO controllers are visible in /sys/class/gpio. Each controller controls a number of GPIO signals.
  2. The GPIO signals must be exported into the sysfs before they can be manipulated. The number of the GPIO signal must be written to the GPIO export file to cause this to happen.
  3. After exporting the GPIO signal a new directory based on the GPIO signal number will appear in /sys/class/gpio. Under that directory are direction and value files that can be read and written.

Mounting Sysfs

The root file system being used may not have sysfs mounted and it cannot be used if it's not mounted. The directory /sys is also needed to mount the sysfs on. The root file system must be writable to do the following steps.

> mkdir /sys > mount -t sysfs sysfs /sys

Using the GPIO driver from User Space

Figuring out the exact GPIO was not totally obvious when there were multiple GPIOs in the system. One way to do is to go into the gpiochips in /sys/class/gpio and view the label as it should reflect the address of the GPIO in the system. The name of the chip appears to be the 1st GPIO of the controller.

> [email protected]_2:~# cd /sys/class/gpio/ /* For ZynqMP */ > [email protected]_2:/sys/class/gpio# ls export gpiochip306 gpiochip322 gpiochip338 unexport > [email protected]_2:/sys/class/gpio# cat gpiochip338/label zynqmp_gpio The above line indicates that gpio 0th pin starts from 338 and ends at 511 (GPIO has total 174 pins for ZynqMP) /* For Zynq */ > [email protected]_2:~# cd /sys/class/gpio/ > [email protected]_2:~# ls export gpiochip906 unexport > [email protected]_2:/sys/class/gpio# cat gpiochip906/label zynq_gpio The above line indicates that gpio 0th pin starts from 906 and ends at 1023 (GPIO has total 118 pins for Zynq)


It may also be calculated ahead of time based on compile-time options for Linux. The basic formula (for Zynq) is base_gpio=ARCH_NR_GPIOS - ZYNQ_GPIO_NR_GPIOS. Then, allocated_gpios=ARCH_NR_GPIOS - base_gpio. Next, other_gpio=allocated_gpios - ZYNQ_GPIO_NR_GPIOS. Finally, gpio_offset=base_gpio + other_gpio. So, to calculate a specific GPIO number, it is base_gpio + other_gpios. This method may not be reliable permanently if ARCH_NR_GPIOS or ZYNQ_GPIO_NR_GPIOS changes without warning in the Linux kernel source code. See the Linux Kernel Mailing List for more details on the challenges with this method: https://lkml.org/lkml/2014/7/7/390

The following commands from the console setup:

  1. Export a GPIO pin
  2. Read the direction and value from the GPIO pin.
  3. Set the direction to an output and write a value 1 to GPIO pin
/* Export a GPIO pin */ > [email protected]_3:~# echo 338 > /sys/class/gpio/export /* Read the direction and value from the GPIO pin */ > [email protected]_3:~# ls /sys/class/gpio/gpio338/ Output: active_low direction power uevent device edge subsystem value > [email protected]_3:~# cat /sys/class/gpio/gpio338/direction Output: in > [email protected]_3:~# cat /sys/class/gpio/gpio338/value Output: 0 /* Set the direction to an output and write a value 1 to GPIO pin */ > [email protected]_3:~# ls /sys/class/gpio/gpio338 Output: active_low direction power uevent device edge subsystem value > [email protected]_3:~# echo out > /sys/class/gpio/gpio338/direction > [email protected]_3:~# echo 1 > /sys/class/gpio/gpio338/value

The performance of this is pretty good. Using nfs root, running open source linux on the ML507 reference system, the GPIO can be toggled about every 4 usec.
This page, GPIO User Space Application, shows the application and provides it for download.


The gpio-keys, gpio-keys-polled and leds-gpio drivers are a powerful alternative to the SysFs interface for accessing GPIO from user space.

  • gpio-keys is used when GPIO line can generate interrupts in response to a key press.
  • gpio-keys-polled is used when GPIO line cannot generate interrupts, so it needs to be periodically polled by a timer.
  • leds-gpio will handle LEDs connected to GPIO lines, giving the LED sysfs interface.

This section covers process of modifying the device tree (DTS) and kernel configuration and includes an example application to demonstrate the function of these drivers.
These drivers are suitable for more complex applications involving generating patterns or handling interrupts.

Additional Setup Required

Required Information from the Device Tree

Use your preferred editor to open the device tree DTS file and locate the GPIO controller under the AXI interconnect; it should look something like this:

ps7_gpio_0: [email protected] { #gpio-cells = <2>; clocks = <&clkc 42>; compatible = "xlnx,zynq-gpio-1.0"; emio-gpio-width = <64>; gpio-controller ; gpio-mask-high = <0x0>; gpio-mask-low = <0x5600>; interrupt-parent = <&ps7_scugic_0>; interrupts = <0 20 4>; reg = <0xe000a000 0x1000>; };

Note the name of your GPIO controller, since you will need it to create the new nodes; in this example it is ps7_gpio_0.

LEDS-GPIO Driver

Add LEDs to the Device Tree

The leds-gpio driver enables many LED control schemes (via the "default-trigger" option) and allows them to be modified from user space; these drivers are suitable for any output-only GPIO application.
Under the AXI interconnect, create a node named “leds-gpio”, like in the example below:

gpio-leds { compatible = "gpio-leds"; led-ds23 { label = "led-ds23"; gpios = <&ps7_gpio_0 10 0>; default-state = "on"; linux,default-trigger = "heartbeat"; }; };

Multiple LEDs can be nested at the same level as led-ds23 within gpio-leds. In this example, the LED is named led-ds23 to match the label ("DS23") on the ZC702 board, but this does not have any technical impact.
The string <&ps7_gpio_0 10 0> references the GPIO controller and states that this device is on the GPIO pin/bit of 10; the 0 states that the device is active high.
The default-trigger property dictates that the control scheme for the LED is “heartbeat” mode; in this mode the LED will double-pulse with a frequency relative to the CPU load.

Kernel Configuration

In order to use these drivers the kernel must be configured correctly. Configure the kernel as described in Build Kernel, and then make sure the following options are enabled in menuconfig:

  • Device Drivers
    • GPIO Support
      • Xilinx GPIO support
      • Xilinx Zynq GPIO support
    • LED Support
      • LED Class Support
      • LED Support for GPIO connected LEDs
      • LED Trigger support

The following configs should be present in .config afterwards:

  • CONFIG_NEW_LEDS
  • CONFIG_LEDS_CLASS
  • CONFIG_LEDS_TRIGGERS (all)
  • CONFIG_LEDS_GPIO

Using the LEDs

The LED can then be accessed from /sys/class/leds/led-ds23. Depending on the trigger type selected, different files will be visible; the trigger type can be changed by writing to /sys/class/leds/led-ds23/trigger.
A full list of triggers can be found at Documentation/devicetree/bindings/leds/common.txt.

GPIO-Keys Driver

GPIO Keys are more complex than LEDs. These drivers offer proper interrupt handling and work well with multi-key setups by mapping each key to a linux code; the entire gpio-keys node will be read as a single device with multiple key codes (like a keyboard).

Add GPIO-Keys to the Device Tree

Under the AXI interconnect, create a node named “gpio-keys”, like in the example below:

gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; autorepeat; sw14 { label = "sw14"; gpios = <&ps7_gpio_0 12 0>; linux,code = <108>; /* down */ gpio-key,wakeup; autorepeat; }; sw13 { label = "sw13"; gpios = <&ps7_gpio_0 14 0>; linux,code = <103>; /* up */ gpio-key,wakeup; autorepeat; }; };
  • The string <&ps7_gpio_0 12 0> references the GPIO controller and states that sw14 device is on pin 12, while sw13 is on pin 14; the 0 states that the device is active high.
  • The linux,code property determines which key will show up in the event.
  • The autorepeat property allows holding the key to continuously generate events.
  • Using gpio-key,wakeup will enable the GPIO to wake the system from suspend.

Full documentation can be found here Documentation/devicetree/bindings/input/gpio-keys.txt.

Kernel Configuration

In order to use these drivers the kernel must be configured correctly. Configure the kernel as described in Build Kernel, and then make sure the following options are enabled in menuconfig:

  • Device Drivers
    • GPIO Support
      • Xilinx GPIO support
      • Xilinx Zynq GPIO support
    • Input device support
      • Keyboards
        • GPIO Buttons
        • Polled GPIO buttons


The following configs should be present in .config afterwards:

  • CONFIG_KEYBOARD_GPIO and CONFIG_KEYBOARD_GPIO_POLLED respectively


At this point, the Linux kernel is ready to be rebuilt.

Using the GPIO-Keys

The key events generated by the GPIO-keys can be read by opening the file /dev/input/event0. For a quick test, use cat /dev/input/event0 | hexdump and then press a key and the input event will print to the console; this data is of the input_event structure and is documented here Documentation/input/input.txt.

GPIO-Keys-Polled

For GPIO that do not use interrupts, the gpio-keys-polled drivers can be used and will still benefit from having linux key codes associated with them. Like in the previous example, create a new node under the AXI interconnect, but this time name it “gpio-keys-polled”. The structure for gpio-keys-polled is almost identical to that of gpio-keys – the polled keys do not have any interrupt capabilities, so gpio-key,wakeup is not relevant; the gpio-keys-polled driver also includes a poll-interval property, in milli-seconds.
Full documentation of this driver can be found here Documentation/devicetree/bindings/input/gpio-keys-polled.txt.

Demo Application

This application showcases the use of the gpio-keys and leds-gpio drivers by passing events into user space and then modifying the LEDs from there:

#include <stdio.h> #include <stdlib.h> #include <time.h> #include <fcntl.h> #include <signal.h> #include <pthread.h> #include <linux/input.= 10) { printf("Error writing trigger"); return 1; } close(tmp); printf("Configured LED for use\n"); /* Create thread */ pthread_mutex_init(&lock, NULL); pthread_create(&pth, NULL, LEDMod, "Blinking LED..."); /* Read event0 */ tmp = open(INPUT_EVENT, O_RDONLY); if (tmp < 0) { printf("\nOpen " INPUT_EVENT " failed!\n"); return 1; } /* Read and parse event, update global variable */ while (1) { if (read(tmp, &ev, size) < size) { printf("\nReading from " INPUT_EVENT " failed!\n"); return 1; } if (ev.value == 1 && ev.type == 1) { /* Down press only */ key_code = ev.code; if (key_code == KEY_DOWN) { /* lower speed */ /* Protect from concurrent read/write */ pthread_mutex_lock(&lock); if (led_speed > 0) led_speed -= 1; pthread_mutex_unlock(&lock); } else if (key_code == KEY_UP) { /* raise speed */ pthread_mutex_lock(&lock); if (led_speed < 9) led_speed += 1; pthread_mutex_unlock(&lock); } printf("Speed: %i\n", led_speed); usleep(1000); } } }

Run this application with leds-gpio and either gpio-keys or gpio-keys-polled. The demo will allow you to use push buttons to dictate the frequency of LED blinking using the kernel drivers.

Expected Output

zynq> cat /sys/class/gpio/ export gpiochip906/ unexport zynq> cat /sys/class/gpio/gpiochip906/ base label power/ uevent device/ ngpio subsystem/ zynq> cat /sys/class/gpio/gpiochip906/label zynq_gpio zynq> echo 906 > /sys/class/gpio/export zynq> echo out > /sys/class/gpio/gpio gpio906/ gpiochip906/ zynq> echo out > /sys/class/gpio/gpio906/direction zynq> echo 1 > /sys/class/gpio/gpio906/value zynq>

This driver is currently in sync with mainline kernel.

Recently sent few patches, Those are applied on mainline, Xilinx 5.10 repo contains those changes.

2016.3
Summary:

  • gpio:Added zynq specific check for special pins on bank zero.

Commits:

  • e3296f1 gpio:Added zynq specific check for special pins on bank zero.


2016.4


2017.1
Summary:

  • gpio: zynq: Add support for suspend resume
  • gpio: zynq: Wakeup gpio controller when it is used as IRQ controller

Commits:

  • 764c694 gpio: zynq: Add support for suspend resume
  • 6a8c796 gpio: zynq: Wakeup gpio controller when it is used as IRQ controller


2017.2


2017.3
Summary:

  • gpio: gpio-zynq.c: Fix kernel doc warnings
  • gpio: gpio-zynq: Fix warnings in the driver
  • gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level
  • gpio: zynq: Clarify quirk and provide helper function
  • gpio: zynq: Provided workaround for GPIO

Commits:

  • 9572161 gpio: gpio-zynq.c: Fix kernel doc warnings
  • a9e595b gpio: gpio-zynq: Fix warnings in the driver
  • 554ae6b gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level
  • 913cf8b gpio: zynq: Clarify quirk and provide helper function
  • 8bc5037 gpio: zynq: Provided workaround for GPIO


2017.4


2018.1
Summary:

  • gpio: zynq: Add support for suspend resume


Commits:

  • e11de4d gpio: zynq: Add support for suspend resume

2018.2
Summary:

  • gpio: zynq: protect direction in/out with a spinlock


Commits:

  • 355168 gpio: zynq: protect direction in/out with a spinlock

2018.3

Summary:
  • gpio: zynq: Remove call to platform_get_irq
  • gpio: zynq: simplifly getting drvdata
  • gpio: zynq: Setup chip->base based on alias ID
Commits:
  • 52b64a2 gpio: zynq: Remove call to platform_get_irq 
  • eb816d4 gpio: zynq: simplifly getting drvdata
  • 5dd4162 gpio: zynq: Setup chip->base based on alias ID

2019.1

  • summary:
    • gpio: zynq: Configured zynq gpio's in boot loader stage.
    • gpio: zynq: Added support runtime PM for GPIO
    • gpio: zynq: Disable the irq if it is not a wakeup source
  • commits:
    • 81e13db: Report gpio direction at boot
    • d2fe433:  properly support runtime PM for GPIO used as interrupts
    • 65b9290: Disable the irq if it is not a wakeup source

2019.2

    • summary
      • gpio: zynq: Add pmc gpio support
    • commits

2020.1

  • Summary
    • gpio:zynq: Remove error prints in EPROBE_DEFER
    • gpio:zynq:use module_platform_driver to simplify the code
  • commits
    • 9b515a08 :Remove error prints in EPROBE_DEFER
    • 5230a062 :use module_platform_driver to simplify the code

2020.2

2021.1

Sours: https://xilinx-wiki.atlassian.net/wiki/display/A/Linux+GPIO+Driver

You will also be interested:

PS GPIO¶

The Zynq device has up to 64 GPIO from PS to PL. These can be used for simple control type operations. For example, in the base overlay, the PS GPIO wires are used as the reset signals for the IOPs. The PS GPIO are a very simple interface and there is no IP required in the PL to use them.

The GPIO class is used to control the PS GPIO. Note that AXI GPIO are controlled by the AxiGPIO class.

Block Diagram¶

../_images/ps_gpio.png

Linux GPIO¶

The PS GPIO use a Linux kernel module to control the GPIO. This means that the operating systems assign a number to the GPIO at run time. Before using the PS GPIO, the Linux pin number must be mapped to the Python GPIO instance.

The function which is part of the GPIO class is used to map the PS pin number to the Linux pin number. See the example below on how it can be used.

Example¶

The PS GPIO need to be connected to something in an overlay before they can be used. The example below is for illustration. It shows a code snippet that needs an appropriate overlay with the PS GPIO connected to something.

frompynqimportGPIOoutput=GPIO(GPIO.get_gpio_pin(0),'out')input=GPIO(GPIO.get_gpio_pin(1),'in')output.write(0)input.read()

More information about the GPIO module and the API for reading, writing and waiting for interrupts can be found in the pynq.gpio Module sections

Sours: https://pynq.readthedocs.io/en/v2.3/pynq_libraries/psgpio.html


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